A Novel Binary Arithmetic Computational Method
Abstract
The proposed algorithm for arithmetic operations presents an innovative and intriguing approach,
primarily centered around the use of counters and the manipulation of ‘1’s in binary representations.
This algorithm promises to introduce significant advancements in computational efficiency and accuracy, making it a potential game-changer in the field of arithmetic calculations. At the core of this method lies the reliance on the number of ‘1’s in each location within a binary number. The user’s task is to count these ‘1’s accurately, as the entire algorithm pivots on this crucial factor. If the count of ‘1’s at a specific location is odd, the resulting sum output is ‘1’; otherwise, it is ‘0’. Moreover, to ensure continuity in the calculations, half of the ‘1’s will be carried over to the subsequent level, contributing to a streamlined and consistent computational process. One of the standout features of this approach is its adaptability to handle signed binary computations with ease. The use of the 1’s and 2’s complement methodology further enhances its capability to deal with negative numbers efficiently, demonstrating its robustness and versatility. With its focus on optimizing the utilization of ‘1’s in binary numbers, this algorithm showcases a fresh perspective in arithmetic operations. By leveraging this fundamental element, it opens up new possibilities for enhancing the speed and accuracy of calculations, potentially revolutionizing diverse applications, such as data processing, encryption, and digital signal processing. Furthermore, the reliance on counters as a foundational concept in this algorithm introduces an element of parallel processing, leading to potential opportunities for harnessing the power of parallel computing architectures, thereby optimizing its implementation on modern computational platforms.
Keyworde: Arithmetic operation, logical computation, binary number
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Refrences:
- Yeh WC, Tan SY, Zhu W, Huang CL, Yang GY. Novel binary addition tree algorithm (BAT) forcalculating the direct lower-bound of the highly reliable binary-state network reliability. Reliab EngSyst Saf. 2022 Jul 1; 223: 108509.
- Jain RP. Modern digital electronics. New Delhi: Tata McGraw-Hill Education; 2003.
- Fettweis A. Digital circuits and systems. IEEE Trans Circuits Syst. 1984 Jan; 31(1): 31–48.
- Roth CH. Teaching digital system design using VHDL. In Proceedings of 1994 IEEE Frontiers inEducation Conference-FIE’94. 1994 Nov 2; 102–105.
- Anand R. Digital Electronics. 2nd Edn. India: Khanna Publishing House; 2014.
- Marpe D, Schwarz H, Wiegand T. Context-based adaptive binary arithmetic coding in the H.264/AVC video compression standard. IEEE Trans Circuits Syst Video Technol. 2003 Jul; 13(7):620–636.
- Yeh WC. Novel binary-addition tree algorithm (BAT) for binary-state network reliability problem.Reliab Eng Syst Saf. 2021 Apr 1; 208: 107448.
- Belyaev E, Turlikov A, Egiazarian K, Gabbouj M. An efficient adaptive binary arithmetic coderwith low memory requirement. IEEE J Sel Topics Signal Process. 2013 Jun 18; 7(6): 1053–61.
- Santana Jr CJ, Macedo M, Siqueira H, Gokhale A, Bastos-Filho CJ. A novel binary artificial beecolony algorithm. Future Gener Comput Syst. 2019 Sep 1; 98: 180–96.
- Su YZ, Yeh WC. Binary-addition tree algorithm-based resilience assessment for binary-statenetwork problems. Electronics. 2020 Jul 27; 9(8): 1207.